Greg Lee

Livermore Computing
Email: lee218@llnl.gov
Phone: +19254246554

Greg is a computer scientist in Livermore Computing's (LC's) Development Environment Group (DEG) at Lawrence Livermore National Laboratory (LLNL). He helps scientists make sure their simulations run correctly and efficiently on LLNL’s supercomputers. This involves interacting with the code developers and users, working on the simulation codes, supporting third-party tools, and developing tools, all with the goal of maximizing LC users’ productivity and ultimately to facilitate good science towards the Laboratory’s mission. Greg's particular focus areas include debuggers, the Python programming language, compilers, and math libraries. He is the primary developer of the Stack Trace Analysis Tool (STAT), a 2011 R&D100 award winner, and a collaborator on the PRUNERS project, a 2017 R&D 100 finalist.

Greg is currently the Development Environment User Support Lead. He is also the lead for the ISCP-funded Advanced Architecture Testing and Evaluation project. Previously Greg led the Tri-lab Common Computing Environment “Programming Environment Development/Support for Tri-Lab Systems” working group.

He received his Master's degree in computer science from the University of California, San Diego in 2006 and his Bachelor's degree in computer science from the University of California, Davis in 2003. He has been working full-time at LLNL since 2006 and prior to that participated as an LLNL summer student scholar in 2005. Prior to joining the Lab, Greg was a professional tennis player and coach, at one point ranked 1326 in the world.

Publications

  1. S. Atzeni, D. H. Ahn, G. Gopalakrishnan, I. Laguna, G. L. Lee, Z. Rakamaric, “SWORD: A Bounded Memory-Overhead Detector of OpenMP Data Races in Production Runs,” in IEEE International Parallel and Distributed Processing Symposium (IPDPS), Vancouver, BC, Canada, May 2018.

  2. K. Sato, D. H. Ahn, I. Laguna, G. L. Lee, M.Schulz, C. Chambreau, “Noise Injection Techniques to Expose Subtle and Unintended Message Races,” In The Proceedings of the 22nd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, Austin, TX, Feb 2017.

  3. S. Atzeni, D. H. Ahn, G. Gopalakrishnan, I. Laguna, G.L. Lee, M. Muller, J. Protze, Z. Rakamaric, M. Schulz, “ARCHER: Effectively Spotting Data Races in Large OpenMP Applications,” IEEE International Parallel and Distributed Processing Symposium (IPDPS), Chicago, IL, May 2016.

  4. T. Gamblin, M. LeGendre, M. R. Collette, A. Moody, B. R. de Supinski, S. Futral, “The Spack package manager: bringing order to HPC software chaos,” SuperComputing 2015 (SC2015), Austin, TX, November 2015.

  5. K. Sato, D. H. Ahn, I. Laguna, G. L. Lee, M. Schulz, “Clock delta compression for scalable order-replay of non-deterministic parallel applications,” SuperComputing 2015 (SC2015), Austin, TX, November 2015.
  6. I. Laguna, D. H. Ahn, B. R. de Supinski, T. Gamblin, G. L. Lee, M. Schulz, S. Bagchi, M. Kulkarni, B. Zhou, Z. Chen, F. Qin, “Debugging high-performance computing applications at massive scales,” Communication of the ACM: Volume 58 Issue 9, September 2015.
  7. N. B. Jensen, N. Q. Nielsen, G. L. Lee, S. Karlsson, M. LeGendre, M. Schulz, D. H. Ahn, “A Scalable Prescriptive Parallel Debugging Model,” International Parallel and Distributed Processing Symposium (IPDPS 2015), Hyderabad, India, May 2015.
  8. S. Atzeni, G. Gopalakrishnan, Z. Rakamaric, D. H. Ahn, I. Laguna, M. Schulz, G. L. Lee, J. Protze, M. Muller, “Archer: Effectively Spotting Data Races in Large OpenMP Applications,” 8th International Workshop on Exploiting Concurrency Efficiently and Correctly (EC2 2015), San Francisco, CA 2015.
  9. S. Atzeni, D. H. Ahn, M. Schulz, G. Gopalakrishnan, M. S. Muller, I. Laguna, Z. Rakamaric, G. L. Lee, “Towards Providing Low-Overhead Data Race Detection for Large OpenMP Applications,” LLVM Compiler Infrastructure in HPC Workshop (LLVM-HPC 2014), New Orleans, LA 2014.
  10. D. H. Ahn, G. L. Lee, G. Gopalakrishnan, Z. Rakamaric, M. Schulz, I. Laguna, “Overcoming Extreme-Scale Reproducibility Challenges Through a Unified, Targeted, and Multilevel Toolset,” 1st International Workshop on Software Engineering for High Performance Computing in Computational Science and Engineering (SE-HPCCSE 2013), Denver, CO 2013.
  11. D. H. Ahn, M. J. Brim, B. R. de Supinski, T. Gamblin, G. L. Lee, M. P. LeGendre, B. P. Miller, A. Moody, M. Schulz, Efficient and Scalable Retrieval Techniques for Global File Properties, in the Proceedings of the 27th IEEE International Parallel and Distributed Processing Symposium (IPDPS), Boston, MA, May, 2013  
  12. W. Chiang, G. Gopalakrishnan, Z. Rakamaric, D. H. Ahn,  G. L. Lee, Determinism and Reproducibility in Large-Scale HPC Systems, in the informal Proceedings of the 4th Workshop on Determinism and Correctness in Parallel Programming (WoDET), Houston, Texas, March 2013.
  13. J. Goehner, D. C. Arnold, D. H. Ahn, B. R. de Supinski, G. L. Lee, M. P. Legendre, M. Schulz, B. P. Miller, “A Framework for Bootstrapping Extreme Scale Software Systems,” First International Workshop on High-performance Infrastructure for Scalable Tools (WHIST), Tucson, AZ, June, 2011.
  14. D. H. Ahn, B. R. de Supinski, I. Laguna, G. L. Lee, B. Liblit, B. P. Miller, and M. Schulz, “Scalable Temporal Order Analysis for Large Scale Debugging,” SuperComputing 2009 (SC2009), Portland, OR, November 2009.
  15. G. L. Lee, D. H. Ahn, D. C. Arnold, B. R. de Supinski, M. Legendre, B. P. Miller, M. Schulz, B. Liblit.  “Lessons Learned at 128K: Towards Debugging Millions of Cores”, submitted to SuperComputing, Austin, TX, November 2008.
  16. D. H. Ahn, D. C. Arnold, B. R. de Supinski, G. L. Lee, B. P. Miller, M. Schulz. “Overcoming Scalability Challenges for Tool Daemon Launching”, submitted to International Conference on Parallel Processing, Portland, OR, September 2008.
  17. G. L. Lee, D. H. Ahn, B. R. de Supinski, J. Gyllenhaal, P. Miller.  “Pynamic: the Python Dynamic Benchmark”,  IEEE International Symposium on Workload Characterization, Boston, MA, September 2007
  18. G. L. Lee, D. H. Ahn, D. C. Arnold, B. R. de Supinski, B. P. Miller, M. Schulz.  “Benchmarking the Stack Trace Analysis Tool for BlueGene/L”, International Conference on Parallel Computing, Jülich, Germany, September 2007.
  19. G. L. Lee, M. Schulz, D. H. Ahn, A. Bernat, B. R. de Supinski, S. Y. Ko, B. Rountree.  “Dynamic Binary Instrumentation and Data Aggregation on Large Scale Systems”, International Journal of Parallel Programming 35(3), pp. 207-232, June 2007.
  20. D. C. Arnold, D. H. Ahn, B. R. de Supinski, G. L. Lee, B. P. Miller, and M. Schulz, "Stack Trace Analysis for Large Scale Applications", International Parallel & Distributed Processing Symposium, Long Beach, CA, March 2007.
  21. M. Schulz, D. Ahn, A. Bernat, B. R. de Supinski, S. Y. Ko, G. Lee, and B. Rountree, "Scalable Dynamic Binary Instrumentation for Blue Gene/L." ACM SIGARCH Computer Architecture News 33(5), pp. 9-14, December, 2005.