Maya B. Gokhale

Portrait of  Maya B. Gokhale

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    (925) 422-9864
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Maya Gokhale is Distinguished Member of Technical Staff at the Lawrence Livermore National Laboratory, USA.  Maya received a Ph.D. in Computer Science from University of Pennsylvania in 1983. Her current research interests include data intensive architectures and reconfigurable computing. Maya is co-recipient of an R&D 100 award for a C-to-FPGA compiler, co-recipient of four patents related to memory architectures for embedded processors, reconfigurable computing architectures, and cybersecurity, and co-author of more than one hundred technical publications.

Research Interests

  • Data-centric computing architectures
  • High performance embeddable architectures
  • Reconfigurable computing
  • Systems software
  • Parallel Languages
  • Parallel computing systems

Recent Professional Experience


Distinguished Member of Technical Staff, Center for Applied Scientific Computing, Lawrence Livermore National Laboratory (LLNL), Livermore, CA


Computer Scientist, Center for Applied Scientific Computing, Lawrence Livermore National Laboratory (LLNL), Livermore, CA


Team Leader (2005-2007, Application Specific Architectures in Advanced Computing Lab); Deputy Group Leader (2002-2004, Space Data Systems); Project Leader (1999-2002, Deployable Adaptive Processing Systems in Space Data Systems)

Ph.D., Computer and Information Sciences, University of Pennsylvania, 1983

M.S.E., Computer and Information Sciences, University of Pennsylvania, 1977

B.S., Math, Wake Forest University, 1972

Z. H. Wu, M. B. Gokhale, G. S. Lloyd, H. D. Patel, "SCCL: An open-source SystemC to RTL translator," in IEEE International Symposium on Field Programmable Custom Computing Machines (FCCM), May, 2023.

M. Barrow, Z. Wu, S. Lloyd, M. Gokhale, H. Patel, P. Lindstrom, "ZHW:  A Numerical CODEC for Big Data Scientific Computation," International Conference on Field Programmable Technology (FPT 2022), pp. 1-9, December 2022.  doi:10.1109/ICFPT56656.2022.9974258.

H. Cılasun, C. Macaraeg, I. Peng, A. Sarkar, and M. Gokhale, “Fpga-accelerated simulation of variable latency memory systems,” in International Symposium on Memory Systems MEMSYS22. ACM, September 2022.

I. Peng, R. Pearce, and M. Gokhale, “Enabling scalable and extensible memory-mapped datastores in userspace,” in Transactions on Parallel and Distributed Systems, 2021.

A. K. Jain, G. S. Lloyd, and M. Gokhale, “Performance assessment of emerging memories through FPGA emulation,” IEEE Micro, vol. 39, no. 1, pp. 8–16, 2019. [Online]. Available:

Scott Lloyd and Maya Gokhale, “In-memory data rearrangement for irregular, data intensive computing,” IEEE Computer, August 2015, v. 48, no. 8, pp. 18–25. 

Roger Pearce, Maya Gokhale, and Nancy Amato, “Faster Parallel Traversal of Scale Free Graphs at Extreme Scale with Vertex Delegates,” International Conference for High Performance Computing, Networking, Storage, and Analysis, November 2014.

Sasha K. Ames, David A. Hysom, Shea N. Gardner, G. Scott Lloyd, Maya B. Gokhale and Jonathan E. Allen, “Scalable metagenomic taxonomy classification using a reference genome database,” Bioinformatics, July 2, 2013 (open access).

Justin L. Tripp, Maya B. Gokhale, Kristopher D. Peterson, “Trident: From High-Level Language to Hardware Circuitry,” IEEE Computer, March 2007.

Maya Gokhale and Paul Graham, Reconfigurable Computing: Accelerating Computation with Field-Programmable Gate Arrays, Springer, 2005.

Maya Gokhale, Dave Dubois, Andy Dubois, Mike Boorman, Steve Poole, Vic Hogsett, “Granidt: Towards Gi- gabit Rate Network Intrusion Detection Technology,” Field Programmable Logic 2002 , Sept. 2002. Selected in 2015 as one of 27 significant papers in 25 years of FPL. 

Maya Gokhale, Janice Stone, Jeff Arnold, and Mirek Kalinowski, “Stream-Oriented FPGA programming in the Streams-C High Level Language”, IEEE Conference on FPGAs for Custom Computing FCCM 2000. Selected in 2013 as one of the 25 significant papers in the past 20 years of FCCM. 

M. Gokhale, B. Holmes, and K. Iobst, "Processing in Memory: The Terasys Massively Parallel Processor-in-Memory Array," IEEE Computer, April, 1995, pp. 23--31.

M. Gokhale, W. Holmes, A. Kopser and S. Lucas and R. Minnich and D. Sweely and D. Lopresti, “Building and using a highly parallel programmable logic array”, IEEE Computer, Jan. 1991, pp. 81–89. 

  • Magna Cum Laude
  • Phi Beta Kappa
  • National Intelligence Community Award co-recipient
  • R&D 100 co-recipient for Trident C to FPGA compiler
  • Fellow, IEEE