Brian C Van Essen
Brian is Computer Scientist at the Center for Applied Scientific Computing at Lawrence Livermore National Laboratory (LLNL). His research interests include developing spatial accelerators for embedded systems and high performance computing, reconfigurable computing, and memory architectures for data-intensive computing. He recently completed his Doctorate at the University of Washington where he studied architectural techniques for improving the energy efficiency of Coarse-Grained Reconfigurable Arrays.
Dr. Van Essen joined LLNL in October of 2010 after earning his Ph.D. in Computer Science and Engineering from the University of Washington in Seattle. He also holds a M.S in Computer Science and Engineering from the University of Washington, a M.S in Electrical and Computer Engineering from Carnegie Mellon University, and a B.S. in Electrical and Computer Engineering from Carnegie Mellon University.
Prior to his graduate studies, Brian co-founded two startups in the area of reconfigurable computing and worked as a verification engineer at Cisco Systems.
PublicationsBrian Van Essen, Henry Hsieh, Sasha Ames, Maya Gokhale. ``DI-MMAP: A High Performance Memory-Map Runtime for Data-Intensive Applications'', in the 1st International Workshop on Data-Intensive Scalable Computing Systems (DISCS-2012), Nov. 16 2012, Salt Lake City, UT. LLNL- CONF-583953
Dries Kimpe, Kathryn Mohror, Adam Moody, Brian Van Essen, Maya Gokhale, Rob Ross and Bronis R. de Supinski. ``Integrated In-System Storage Architecture for High Performance Computing'', in the Proceedings of the 2nd International Workshop on Runtime and Operating Systems for Supercomputers (ROSS '12), June 29 2012, Venice, Italy.
Brian Van Essen, Roger Pearce, Sasha Ames, Maya Gokhale. ``On the role of NVRAM in data-intensive architectures: an evaluation", in the 26th IEEE International Parallel & Distributed Processing Symposium, May 21-25 2012, Shanghai, China.
Brian Van Essen, Chris Macaraeg, Ryan Prenger, Maya Gokhale. ``Accelerating a random forest classifier: multi-core, GP-GPU, or FPGA?", to appear in the 20th Annual International IEEE Symposium on Field-Programmable Custom Computing Machines, April 29 2012 - May 1 2012, Toronto, Canada.
Brian Van Essen, Robin Panda, Aaron Wood, Carl Ebeling, and Scott Hauck. ``Energy-efficient specialization of functional units in a Coarse-Grained Reconfigurable Array'', in the 19th ACM/SIGDA International Symposium on Field-Programmable Gate arrays, Feb. 27 2011 - Mar. 1 2011.
Brian Van Essen, Robin Panda, Carl Ebeling, and Scott Hauck. ``Managing Short-lived and Long-lived Values in Coarse-Grained Reconfigurable Arrays'', in Proceedings of 2010 IEEE International Conference on Field Programmable Logic and Applications, Aug. 31 2010 - Sept. 2 2010.
Brian Van Essen, Aaron Wood, Allan Carroll, Stephen Friedman, Robin Panda, Benjamin Ylvisaker, Carl Ebeling, and Scott Hauck, "Static Versus Scheduled Interconnect In Coarse-Grained Reconfigurable Arrays", in Proceedings of 2009 IEEE International Conference on Field Programmable Logic and Applications, pages 268-275, Aug. 31 2009-Sept. 2 2009.
Stephen Friedman, Allan Carroll, Brian Van Essen, Benjamin Ylvisaker, Carl Ebeling, and Scott Hauck, "SPR: an architecture-adaptive CGRA mapping tool", In Proceedings of 2009 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Feb. 2009, 191-200.
Benjamin Ylvisaker, Brian Van Essen, and Carl Ebeling. "A Type Architecture for Hybrid Micro-Parallel Computers", In Proceedings of 2006 IEEE Symposium on Field-Programmable Custom Computing Machines, April 2006.